Thread-level　speculation　(TLS)　and　transactional　memory　(TM)　technologies　have　been　studied　for　addressing　the　efficient　automatic　parallel　on　multi-core　processors.　TLS　technology　can　automatically　generate　parallel　code　to　accelerate　the　implementation　of　the　serial　programs.　TM　systems　can　perform　better　the　existing　threads　by　using　implicit　locks　instead　of　spawn　a　new　task.　TLS　and　TM　have　a　huge　semantic　difference,　but　both　of　them　share　much　functionality.　Therefore　utilizing　Us　based　on　TM　can　efficiently　improve　the　serial　program　running　on　the　multi-core　processors.　In　this　paper,　we　introduced　the　loop　transformation　methods　and　the　loop　selection　algorithms　based　on　Us.　Typical　hardware　transactional　memory　(HTM),　software　transactional　memory　(STM)　and　hybrid　transactional　memory　(HyTM)　systems　are　compared　from　isolated,　version　management,　conflict　management,　conflict　resolution　and　etc.　Some　supporting　US　based　on　TM　systems,　likes　transactional　coherence　and　consistency　(TCC),　helper　transactions,　profile　of　a　guided　TLS　&　TM　system　(PTT)　and　STMlite,　are　analyzed　from　thread　spawning　mechanism,　context　passing　mechanism,　sequential　ordering　mechanism　and　etc.