Digital　control　delay　is　studied　as　one　of　the　leading　factors　causing　instability　in　grid-tied　voltage　source　inverter　(VSI)　systems.　However,　how　this　delay　affects　the　small-signal　output　impedance　of　the　VSI　and　how　the　change　in　impedance　shape　further　influences　the　system　stability　are　still　not　clear.　This　article,　for　the　first　time,　thoroughly　analyzes　the　impact　of　delay　on　the　dq-frame　output　impedance　of　the　VSI　operating　in　both　the　single　current　loop　control　mode　and　the　dual-loop　control　mode.　It　is　found　that　when　delay　is　considered,　a　distinct　magnitude　drop　and　a　phase　rise　always　exist　at　the　high-frequency　area　of　the　impedance,　which　is　named　the　＇impedance　trough.＇　By　studying　the　dq-frame　output　impedance　of　the　VSI,　the　origin　of　the　impedance　trough,　and　its　analytical　relationships　with　the　current　loop　dynamics,　voltage　loop　dynamics,　and　delay　values　are　unveiled.　Meanwhile,　the　influence　of　the　impedance　trough　on　the　stability　of　the　grid-tied　VSI　system　under　these　two　control　modes　is　evaluated　through　d-d　channel　impedance　matching　and　generalized　Nyquist　criterion　(GNC).　It　is　demonstrated　that　the　joint　effects　of　delay　and　control　parameters　result　in　the　impedance　mismatch　between　the　grid　and　the　VSI,　which　is　the　root　cause　of　high-frequency　oscillations　in　the　grid-tied　system.　Finally,　experimental　results　verify　the　analysis.　©　1986-2012　IEEE.