This　paper　presents　an　electrocardiogram　(ECG)　processor　for　the　detection　of　arrhythmia　by　using　shared　discrete　wavelet　transform　(DWT)　unit,　optimized　support　vector　machine　(SVM)　engine　and　multi-class　classifier.　The　heartbeat　detection　(HD)　and　feature　extraction　(FE)　can　be　both　implemented　in　a　shared　DWT　unit　with　extremely　low　resource　overhead.　An　optimization　method　is　proposed　for　the　transformation　of　kernel　and　array　scale　reduction　to　lower　the　complexity　of　SVM　engine.　A　compressed　score　matrix　is　exploited　to　reduce　the　computation　burden　of　multi-class　classifier.　The　chip　is　designed　with　a　standard　40　nm　CMOS　process,　which　occupies　area　of　0.54　mm2　and　consumes　10.8　nJ　per　heartbeat　detection　under　1.1　V　supply　voltage　at　100　MHz　operation　frequency.　The　processor　achieving　7-classification　of　arrhythmia　can　be　used　as　real-time　ECG　monitoring　for　clinical　applications　with　an　average　accuracy　of　97.1%,　sensitivity　of　97.1%　and　specificity　of　99.5%,　respectively,　which　has　better　performances　than　other　state-of-the-art　works.　©　2022　IEEE.