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Abstract:
An accurate and cost-effective method for ADC jitter estimation is proposed. The new method only requires a single high-frequency test. Eliminating the need for a 2nd low-frequency test in the conventional dual-frequency tests can significantly save both hardware and data acquisition time. Furthermore, the proposed method does not require the condition of coherent sampling and expensive instruments. Theoretical analysis, simulation and experimental results show that the proposed method is cost-effective and can achieve the test accuracy comparable to conventional dual-frequency tests.
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Source :
IEICE ELECTRONICS EXPRESS
ISSN: 1349-2543
Year: 2012
Issue: 18
Volume: 9
Page: 1485-1491
0 . 2 6 8
JCR@2012
0 . 5 7 8
JCR@2020
ESI Discipline: ENGINEERING;
ESI HC Threshold:157
JCR Journal Grade:4
CAS Journal Grade:4
Cited Count:
WoS CC Cited Count: 2
SCOPUS Cited Count: 3
ESI Highly Cited Papers on the List: 0 Unfold All
WanFang Cited Count:
Chinese Cited Count:
30 Days PV: 3
Affiliated Colleges: