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Author:

Liu, Leibo (Liu, Leibo.) | Yang, Chen (Yang, Chen.) | Yin, Shouyi (Yin, Shouyi.) | Wei, Shaojun (Wei, Shaojun.)

Indexed by:

SCIE EI Scopus

Abstract:

Coarse-grained reconfigurable arrays (CGRAs) can be dynamically programmed by configuration contexts to concurrently run multiple operations on a processing elements array. This further widens the gap between off-chip memory bandwidth demand and the limited speed of off-chip memory access. Cache prefetching is widely used for mitigating off-chip memory latency. However, straightforwardly applying existing prefetching techniques (primarily focusing on instruction driven processors) to CGRA may induce inaccurate prefetching, thereby crippling CGRA performance. Based on repetitively executed context in CGRA computing, this paper proposes a context-directed pattern matching (CDPM) mechanism to improve prefetching accuracy for CGRAs. CDPM generates a prefetch pattern for an initially executed context, and then reuses the pattern to issue prefetch requests when the context is re-executed. In order to eliminate the outdated prefetch pattern, CDPM also evaluates the prefetching accuracy of the prefetch pattern at run-time by adding prefetch addresses to a Bloom filter. The distinguishing feature of CDPM is the employment of the CGRA configuration context as a guide to improving prefetching accuracy. Experimental results showed that CDPM prefetching averagely improved performance by 31.1% compared to tests without prefetching and by 7.7% compared to state-of-the-art cache prefetching techniques, while only incurring slight area and power overheads.

Keyword:

Cache prefetching coarse-grained reconfigurable array (CGRA) context-directed pattern matching (CDPM)

Author Community:

  • [ 1 ] [Liu, Leibo; Yin, Shouyi; Wei, Shaojun] Tsinghua Univ, Inst Microelect Dept, Beijing 100084, Peoples R China
  • [ 2 ] [Yang, Chen] Xi An Jiao Tong Univ, Sch Microelect, Xian 710049, Shaanxi, Peoples R China
  • [ 3 ] [Liu, Leibo]Tsinghua Univ, Inst Microelect Dept, Beijing 100084, Peoples R China
  • [ 4 ] [Yin, Shouyi]Tsinghua Univ, Inst Microelect Dept, Beijing 100084, Peoples R China
  • [ 5 ] [Wei, Shaojun]Tsinghua Univ, Inst Microelect Dept, Beijing 100084, Peoples R China
  • [ 6 ] [Yang, Chen]Xi An Jiao Tong Univ, Sch Microelect, Xian 710049, Shaanxi, Peoples R China

Reprint Author's Address:

  • Xi An Jiao Tong Univ, Sch Microelect, Xian 710049, Shaanxi, Peoples R China.

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Source :

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS

ISSN: 0278-0070

Year: 2018

Issue: 6

Volume: 37

Page: 1171-1184

2 . 4 0 2

JCR@2018

2 . 8 0 7

JCR@2020

ESI Discipline: ENGINEERING;

ESI HC Threshold:108

JCR Journal Grade:2

CAS Journal Grade:3

Cited Count:

WoS CC Cited Count: 4

SCOPUS Cited Count: 5

ESI Highly Cited Papers on the List: 0 Unfold All

WanFang Cited Count:

Chinese Cited Count:

30 Days PV: 8

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